We certify whether a chip design is physically realizable before backend work begins. Our process enforces hard physical constraints and fails fast when designs are impossible, so teams do not waste months pursuing architectures that cannot be built.
We do not replace signoff tools. We prevent impossible designs from ever reaching them.
You provide the physical assumptions of your design, including die size and aspect ratio, macro sizes, keepouts and blockages, and any hard proximity constraints that must be satisfied.
We return either a legal macro placement or a certified infeasibility result. When feasible, we deliver utilization and density analysis along with visual artifacts such as full-die floorplans, density heatmaps, and zoom views. When infeasible, we explain which constraints conflict and what must change to restore feasibility.
Our Feasibility Check answers one critical question: Is there any legal placement that satisfies hard geometry and constraints?
We perform a conservative feasibility analysis that enforces:
- Die and core geometry
- Keepouts
- Macro halos
- Explicit placement constraints (e.g., edge and region constraints)
The goal is to identify infeasibility early, before time and cost are spent on full placement or optimization. When infeasibility is detected, we provide a written feasibility report identifying the blocking constraints and the most direct changes required to achieve feasibility
I normally do early feasibility reviews for $500–$1,500.
For full top-level due diligence reviews, pricing is higher.
Every engagement includes a clear, decision-ready deliverable package, including a summary report, placement visuals, density heatmaps, and zoom views that demonstrate crowding and constraint compliance.
Typical turnaround is measured in days, not weeks.
